Synopsys, Inc. today announced that UMC has adopted Synopsys TetraMAX diagnostics to accelerate yield learning for designs that utilize the Synopsys DFT MAX scan compression automation solution. Rapid yield learning depends on the accuracy and efficiency of failure analysis, a manually intensive and.....
Language : english Authorization: Retail Freshtime：2007-05-03 Size: 102MB
:::::English Description::::::Synopsys?JupiterXT™ design planning solution enables fast feasibility analysis for a preview of implementation results, and provides detailed floor planning capabilities for flat or hierarchical physical design implementation styles. Project leaders and physical d.....
Language : english Authorization: Retail Freshtime：2007-05-03 Size: 227MB
As technology feature sizes shrink, conductors get smaller, and supply voltages reduce, the corresponding current per scaled feature size increases exponentially. These changes cause power-rail IR (voltage) drop and electromigration (EM) effects that significantly degrade performance and might cause.....
Language : english Authorization: Retail Freshtime：2007-05-03 Size: 161MB
Synopsys CoCentric System Studio 2006.12 SP1是一个功能强大的系统级设计环境，主要用于面向创新性SoC设计中算法和系统架构的两个至关重要的系统级设计领域。算法设计涵盖了信号处理，例如移动通信、多媒体编码解码器、DSL和调制解调器。架构设计把正确的处理器、定制逻辑电路、总线、内存和外设相结合，以确保芯片得到最有.....
Language : English Authorization: Retail Freshtime：2007-04-14 Size: 277MB
ynopsys, Inc. (NASDAQ: SNPS), a world leader in semiconductor design software, today announced that Cypress Semiconductor Corp. has successfully taped out its West Bridge™ Antioch™ peripheral controller multimedia 3G/3.5G mobile phone integrated circuit (IC) using the Synopsys Galaxy™ design plat.....
Language : english Authorization: Retail Freshtime：2007-04-14 Size: 103MB
Raphael NXT is a true three-dimensional (3D) capacitance extractor that provides silicon-accurate self and coupling capacitances for IC design. Equipped with an ultrafast extraction engine, Raphael NXT complements Star-RCXT by extracting 3D capacitances of critical nets, cells, or blocks on the f.....
Language : English Authorization: Retail Freshtime：2007-04-14 Size: 10MB
。Complete and accurate cell characterization is essential for automated implementation and verification of complex system-on-chips (SoC). Capturing sufficiently accurate timing, power and signal integrity information, as well as operating condition variability for 90-nm and 65-nm technologies requi.....
Language : english Authorization: Retail Freshtime：2007-04-11 Size: 50MB
::::::HSIMplusHSIMplus™ 2007.03 is a fully-integrated suite of tools for the design and verification of nanometer ICs, built upon the production-proven HSIM hierarchical Fast-SPICE simulator. HSIMplus exceeds the capabilities of competitor’s Fast-SPICE simulators, by providing a complete.....
Language : english Authorization: Retail Freshtime：2007-04-11 Size: 19MB
::::::English Description::::::HSIMplusHSIMplus™ 2007.03 Linux is a fully-integrated suite of tools for the design and verification of nanometer ICs, built upon the production-proven HSIM hierarchical Fast-SPICE simulator. HSIMplus exceeds the capabilities of competitor’s Fast-SPICE simu.....
Language : english Authorization: Retail Freshtime：2007-04-11 Size: 90MB
::::::English Description::::::Synopsys’ Leda® 2007.03 is a programmable design and coding guideline checker that delivers full chip mixed-language (Verilog and VHDL) and mixed representation (RTL & gate) capabilities to speed development of complex system-on-chip (SoC) designs. Leda抯 pre.....
Language : english Authorization: Retail Freshtime：2007-03-13 Size: 103MB
Synopsys Online Documentation——Synopsys的在线文档。::::::English Description::::::SOLID E3-Dimensional Optical Lithography SimulationSOLID E is a window-based software package for simulating and modeling all the processes and techniques involved in optical microlithography. It is able.....
Language : english Authorization: Retail Freshtime：2007-03-13 Size: 998MB
The DesignWare Library provides a comprehensive portfolio of synthesizable and verification IP including an AMBA-based on-chip bus solution, memory IP, popular processor cores, bus and I/O standards, and performance enhancing datapath IP elements.
The following product documentation is for the .....
Language : english Authorization: Retail Freshtime：2007-03-05 Size: 101MB
Synopsys, Inc. (Nasdaq:SNPS), a world leader in semiconductor design software, announced the availability of advanced device parameter measurement functionality in its Hercules(TM) Physical Verification Suite (PVS). Developed to support the latest release of 65-nanometer (nm) design kits from IBM (N.....
Language : english Authorization: Retail Freshtime：2007-02-04 Size: 194MB
>::::::English Description::::::Raphael is the gold standard, 2D and 3D resistance, capacitance, and inductance extraction tool for optimizing multi-level interconnect structures and on-chip parasitics in small cells. As a reference field solver, Raphael provides the most accurate parasitic models i.....
Language : english Authorization: Retail Freshtime：2007-01-17 Size: 36MB
NanoSim™, an advanced circuit simulator for memory and mixed-signal verification, combines best-in-class simulation technologies from TimeMill® and PowerMill® to deliver an unparalleled combination of timing and power analysis and diagnostics in a single tool...
Language : english Authorization: Pre Release Freshtime：2007-01-06 Size: 569MB
::::::English Description::::::FPGA Compiler II Release Notes -------------------------------------------------------------------------------- These release notes present the latest information about FPGA Compiler II version T-2003.09 FC3.8 in the following sections: New Features, Enhancements, and .....
Language : english Authorization: Retail Freshtime：2007-01-06 Size: 90MB
PathMill is a leading-edge, industry-proven static timing analysis tool for block and full-chip timing verification. PathMill enables the custom and system-on-chip (SoC) designer to quickly detect and correct design flaws and timing .::::::English Description::::::PathMill is a leading-edge, indu.....
Language : english Authorization: Retail Freshtime：2006-12-29 Size: 47MB
::::::English Description::::::Synopsys Technology Computer Aided Design (TCAD) offers a comprehensive suite of products that includes the industry leading process and device simulation tools, as well as a powerful GUI-driven simulation environment for managing simulation tasks and analyzing simulat.....
Language : english Authorization: Retail Freshtime：2006-12-29 Size: 865MB
Synopsys AURORA 2007.03 Linux is a complete semiconductor device characterization and parameter extraction system, providing capabilities to measure device characteristics, extract circuit-level model parameters from measured or simulated data, and analyze results graphically. ..
Language : english Authorization: Retail Freshtime：2006-09-09 Size: 78MB