Synplify Pro® FPGA synthesis software, part of the Synopsys FPGA design solution, is the industry standard for producing high-performance, cost-effective FPGA designs. Its unique Behavior Extracting Synthesis Technology® (BEST™) performs optimization at a high level first, before synthesizing the.....
Language : english Authorization: Pre Release Freshtime：2013-03-03 Size: 1DVD
Overview
This course introduces concepts on full-speed hardware debugging using the Identify® toolset which provides an “embedded HDL analyzer” with debug access at the RTL level similar to an RTL simulator. Designers can take this course at their own pace and enjoy the online version of this cla.....
Language : english Authorization: Pre Release Freshtime：2013-03-03 Size: 1DVD
Overview
Formality® is an equivalence-checking (EC) solution that uses formal, static techniques to determine if two versions of a design are functionally equivalent.
The size and complexity of today’s designs, coupled with the challenges of meeting timing, area, power and schedule, requires that.....
Language : english Authorization: Pre Release Freshtime：2013-01-04 Size: 1CD
PrimeTime® static timing analysis (STA) suite includes two key improvements that deliver a dramatic boost to designer productivity. This latest release includes a flexible multicore processing technology that makes more effective use of both single-core and multicore CPUs across today’s compute se.....
Language : english Authorization: Pre Release Freshtime：2013-01-04 Size: 3CD
The Gold Standard for Accurate Circuit Simulation
HSPICE is the industry's "gold standard" for accurate circuit simulation and offers foundry-certified MOS device models with state-of-the-art simulation and analysis algorithms. With over 25 years of successful design tapeouts, HSPICE is the indus.....
Language : english Authorization: Pre Release Freshtime：2012-12-26 Size: 2CD
Highest-throughput mixed-signal simulation with CustomSim and VCS
The majority of today’s designs contain significant analog and mixed-signal content. Even SoCs that are designed for essentially digital functions still require PLLs for timing control, digitally-controlled power management circuits.....
Language : english Authorization: Pre Release Freshtime：2012-12-23 Size: 2DVD
HSPICE 2011.09 – Major Enhancements in September 2011 Release
HSPICE for Analog
HSPICE Precision Parallel technology extended beyond transient analysis to support transient noise, Monte Carlo, IBIS, and MOS reliability analysis (MOSRA)
HPP technology now delivers 10X scaling on.....
Language : english Authorization: Business Freshtime：2012-04-13 Size: 172 MB
Synopsys® Synplify Pro® AE synthesis tool is integrated into Libero IDE, enabling you to target and fully optimize your HDL design for any Actel device. As with other Libero IDE tools, you can launch Synplify Pro AE directly from the Libero IDE Project Manager.
Key features of Synplify Pro AE are.....
Language : Authorization: Pre Release Freshtime：2011-08-25 Size:
Verification is the most time consuming task in ASIC design today.
Certify ASIC RTL prototyping software from the Synopsys® Synplicity®
Business Group helps accelerate the verification phase by allowing you
to build multi-FPGA based prototypes of your ASIC design in an easy,
intuitive fashion, and.....
Language : english Authorization: Pre Release Freshtime：2011-04-15 Size: 183 MB
CustomExplorer™ and Custom WaveView™ form a comprehensive transistor-level debugging environment for analog, mixed-signal and SoC designs. CustomExplorer provides a host of tools for navigating transistor-level designs and verifying simulation results.
Download Datasheet
Introduction
CustomExplo.....
Language : english Authorization: Pre Release Freshtime：2011-01-04 Size: 3CD
NanoSim™ is the cornerstone of Synopsys’ comprehensive mixed-signal verification solution, Discovery AMS. NanoSim is an advanced transistor-level circuit simulation and analysis tool for analog, digital and mixed-signal design verification. It is a robust and easy to use solution, with very high s.....
Language : english Authorization: Pre Release Freshtime：2011-01-04 Size: 2cd
The Synplify solution is a high-performance, sophisticated logic synthesis engine that utilizes proprietary Behavior Extracting Synthesis Technology (B.E.S.T.) to deliver fast, highly efficient FPGA and CPLD designs. The Synplify product takes Verilog and VHDL Hardware Description Languages as input.....
Language : english Authorization: Retail Freshtime：2010-12-17 Size: 435 MB
Process and Device Simulation Tools
Technology Computer-Aided Design (TCAD) refers to the use of computer simulations to develop and optimize semiconductor processing technologies and devices. Synopsys TCAD offers a comprehensive suite of products that includes industry leading process and devi.....
Language : english Authorization: Retail Freshtime：2010-12-13 Size: 2CD
VCS®, with multicore technology, delivers a 2x verification speed-up that helps users find design bugs early in the product development cycle. VCS multicore technology cuts down verification time by running the design, testbench, assertions, coverage and debug in parallel on machines with multiple .....
Language : english Authorization: Pre Release Freshtime：2010-07-30 Size: 354 MB
Saber is a multi-domain modeling and simulation environment that enables full-system virtual prototyping for applications in analog/power electronics, electric power generation/conversion/distribution and mechatronics. Decades of industry success and innovation have earned Saber a reputation as the .....
Language : english Authorization: Pre Release Freshtime：2010-07-29 Size: 1.2 GB
Vera language was orginally developed in Sun Micro Systems for internal ASIC verification projects. Later VERA language with VERA compiler was marketed by System Science. System Science later sold Vera to Synopsys. Synopsys released closed Vera language as openVera, which was later implemented in.....
Language : english Authorization: Pre Release Freshtime：2010-07-13 Size: 287 MB
This synopsysinstaller_INSTALL_README.txt document contains installation instructions for
the Synopsys Installer tool in the following sections:
* General Information
* Installation Procedure
* Using the Installer (EST / FTP Users Only)
* Post-Installation Steps
* Installing From a CD
* Suppo.....
Language : english Authorization: Pre Release Freshtime：2010-07-08 Size: 315 MB
This document describes how to install the HSPICE product.
Note:
The installation instructions in this document are the most up-to-date
available at the time of production. However, changes might have occurred.
For the latest installation information, see the product release notes or
documentation.
.....
Language : english Authorization: Pre Release Freshtime：2010-06-24 Size: 146 MB
Synplify Premier
The Synplify Premier solution is the industry's most productive FPGA implementation and debug environment. It includes all the features of Synplify Pro and additionally provides a comprehensive suite of tools and technologies for advanced FPGA designers as well as ASIC prototypers t.....
Language : english Authorization: Pre Release Freshtime：2010-06-22 Size: 213 MB
Installing CustomExplorer and Custom WaveView
This document describes how to install the CustomExplorer and Custom
WaveView product.
Note:
The installation instructions in this document are the most up-to-date
available at the time of production. However, changes might have occurred.
For the latest .....
Language : english Authorization: Pre Release Freshtime：2010-06-11 Size:
the design technology leader for complex IC design, announced the immediate availability of VERA(TM) CORE, a new high-level verification tool that enables intellectual property (IP) providers and their customers to share an IP verification environment. With VERA CORE, IP providers develop por.....
Language : english Authorization: Retail Freshtime：2010-05-11 Size: 248.5MB
Today’s complex integrated circuit (IC) designs generate a vast amount of simulation data. CosmosScope™ turns that mountain of data into useful information. With powerful analysis and measurement capabilities, patented waveform-calculator technology, and scripting language based on the industry st.....
Language : english Authorization: Pre Release Freshtime：2010-05-03 Size: 75MB
Synopsys System-Level Libraries provide product development teams with a comprehensive set of transaction-level models (TLMs) that serve as the building blocks of virtual prototypes. Virtual prototypes are fully functional software models of complete embedded systems, enabling architecture ex.....
Language : english Authorization: Pre Release Freshtime：2010-05-02 Size: 645MB
Synopsys Innovator 2009.12 SP1 New Release.The Growing Importance of SoftwareSoftware development has traditionally trailed the hardware development as part of a sequential design flow. However, today most chips simply will not reach volume production without the availability of the associated so.....
Language : english Authorization: Pre Release Freshtime：2010-04-24 Size: 409.5MB