Synopsys Siliconsmart vL-2016.03 Comprehensive Cell, I/O and Memory Characterization Overview SiliconSmart® is a comprehensive characterization solution for standard cells, I/O, complex cells and memory. It generates accurate model libraries tightly correlated with Synopsys’ digital implementation tools. Its built-in FineSim™ simulation technology and tight integration with the gold-standard HSPICE® circuit simulator enable characterization and signoff accuracy. SiliconSmart supports all of the standard models, including NLDM (non-linear delay model), CCS (composite current source) and AOCV (advanced on-chip variation) models. SiliconSmart Datasheet Introduction Accurate library characterization is the cornerstone of successful digital implementation. Synthesis, place-and-route, verification and signoff tools rely on detailed model libraries to accurately represent the timing, noise and power performance of digital and memory designs. The complexity of cell libraries dramatically increases as designs migrate to smaller process nodes. Process variability on these nodes requires fast characterization on hundreds of corners. Furthermore, foundries are constantly updating SPICE models, requiring repeated characterization runs. Low-power SoC design further complicates the characterization process by introducing complex cells such as multi-bit flip-flops, multivoltage level shifters and retention logic, which must be accurately characterized to ensure effective digital implementation across multiple power domains. Benefits Signoff-quality libraries with best correlation between HSPICE and PrimeTime® suite SiliconSmart’s precise characterization and modeling capability combined with HSPICE golden accuracy is critical for producing signoff-quality library models, including timing, power, signal integrity and OCV to ensure best PrimeTime accuracy during static timing and power analysis. This unique platform-level integration of SiliconSmart produces the best correlation between PrimeTime and HSPICE for advanced technology nodes Comprehensive solution SiliconSmart is a comprehensive, unified solution that generates libraries for standard cells, I/Os and complex cells, such as multi-bit flip-flops and memories High performance with pre-characterization optimization SiliconSmart increases performance by using innovative pre-characterization optimization and intelligent optimization techniques that reduce the number of simulation runs required during the library characterization phase Advanced node-ready SiliconSmart is ready for characterizing and modeling libraries at advanced technology nodes, such as 16-nm and 14-nm. It supports generation of POCV coefficients and supports the latest FinFET models