Cadence SSV 15.20.000 Cadence Design Systems, Inc., the leader in global electronic design innovation, has released 15.20 version of SSV Platform Products. From synthesis through implementation through signoff, Cadence’s full-flow digital design platform provides a fast path to design closure and better predictability. Where traditional tools fall short, our platform has been developed to help you meet power, performance, and area (PPA) targets and deliver your products on time. Cadence Voltus IC Power Integrity Solution is a full-chip, cell-level power signoff tool that provides accurate, fast, and high-capacity analysis and optimization technologies. The Voltus tool is of particular value to designers for debugging, verifying, and fixing IC chip power consumption, IR drop, and electromigration (EM) constraints and violations. Use the tool to: - Calculate and analyze power consumption - Analyze and optimize EM and IR-drop (EMIR) - Analyze impact of power on design closure, from chip to package to PCB The Voltus solution includes innovative technologies such as massively parallel execution, that can be either multi-threaded or distributed-processing, and physically aware power grid analysis and optimization. Beneficial as a standalone power signoff tool, Voltus IC Power Integrity Solution delivers even more significant productivity gains when used in a highly integrated flow with other key Cadence products, including Cadence Innovus Implementation System, providing the industry’s fastest design closure technology. When used with Cadence Voltus-Fi Custom Power Integrity Solution, a transistor-level electromigration and IR-drop (EMIR) tool delivering foundry-certified SPICE-level accuracy, the resulting platform accelerates IC power signoff and overall design closure.