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Description
Cadence Jaspergold v20.03
Key Benefits
- Finds more bugs in less time, earlier in the design process, compared to other verification methods
- ML-enabled Smart Proof Technology for 2X faster proofs out-of-the-box and 5X faster regressions
- Advanced design scalability for 2X design capacity increase and 50% memory footprint reduction
- Signoff-accurate formal coverage with new intuitive analysis GUI
- Eases debug and what-if analysis with the powerful Visualize interactive debug environment incorporating QuietTrace technology
Our next-generation JasperGold® Formal Verification Platform features machine learning technology and core formal technology enhancements across all JasperGold apps.
Smart Proof Technology
The new JasperGold platform represents the latest stage of ongoing proof-solver algorithm and orchestration improvements. This latest platform incorporates Smart Proof Technology to improve verification throughput for all JasperGold apps. Machine learning is used to select and parameterize solvers to enable faster first-time proofs. Additionally, machine learning is used to optimize successive runs for regression testing, either on premises or in the cloud. With Smart Proof Technology, proofs speed up on average by 2X out of the box, and 5X on regression runs.
Advanced Design Scalability
Given today’s larger and more complex SoC designs, the design compilation process sets the maximum size of design, and the compute resources necessary, to start formal analysis. The updated JasperGold platform delivers more than 2X design compilation capacity with an average of 50% reduction in memory usage during compilation. Additionally, engineers can effectively scale design capacity through advanced parallel compilation technologies that optimally use available compute resources, and by running proofs on the Cloud.
Formal Signoff Enhancements
The platform’s new formal coverage technologies let engineers perform IP signoff purely within the JasperGold platform. These new formal signoff technologies include improved proof-core accuracy, new techniques to derive meaningful coverage from deep bug hunting and new formal coverage analysis views. Together those features deliver signoff-quality formal coverage metrics and enable multi-engine chip-level verification closure.
The JasperGold Formal Verification Platform, part of the Cadence® Verification Suite, offers comprehensive coverage in the vManager™ Metric-Driven Signoff Platform, which combines JasperGold formal results with Xcelium™ simulation and Palladium® emulation metrics to speed overall verification closure.