Cadence GENUS 17.2

Description

Cadence GENUS 17.2

Cadence(R) Genus(TM) Synthesis Solution is a next-generation register-transfer level (RTL) synthesis and physical synthesis engine that addressed the productivity challenges faced by RTL designers. Genus(TM) Synthesis Solution enables timing debug with physical interconnect knowledge built-in.

Key Benefits

  • Up to 10X better RTL design productivity
  • Up to 5X faster turnaround times, with linear scalability beyond 10M instances
  • At least 2X reduction in iterations between unit-, block-, and chip-level synthesis
  • Timing and wirelength within 5% of place and route in the Cadence Innovus Implementation System
  • Up to 20% reduction in datapath area without any impact on performance

 

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