Keysight Model Builder (MBP) 2026

Description

Keysight Model Builder (MBP) 2026

What's New in MBP 2026

Machine Learning Toolkit

New ML optimizer and auto-extraction flows reduce parameter extraction steps from over 200 to fewer than 10. Advanced neural network architectures with ML-based optimization enable global optimization of 80+ parameters in a single run, capturing secondary effects, temperature variations, and dynamic behaviors. Reduces model development time from weeks to hours.

Faster SRAM Workflows

Enhanced SRAM solution with improved parameter panel and optimized extraction flows for memory cell characterization and model generation.

Enhanced Parameter Panel

Redesigned parameter panel for more intuitive model parameter navigation, selection, and tuning during the extraction process.

New Python APIs & MBP Script Functions

Expanded Python automation framework and MBP Script functions for fully automated flow runs, enabling engineers to create custom extraction workflows in minutes.

Improved GUI

Modernized user interface with better usability, efficient model file management, and enhanced model library support.

BSIM Model Support

Continued support for latest BSIM model versions with improved extraction accuracy and convergence.

Core Features

Complete Compact Model Support

Fully automated extraction and optimization flows for BSIM3, BSIM4, BSIM6, BSIMSOI, PSP, HiSIM2, HiSIM_HV, BSIM-CMG, BSIM-IMG, GP, VBIC, HICUM, MEXTRAM, and Level 66 HVMOS models for DC, AC, and RF applications.

Monte Carlo & Statistical Modeling

Complete variation modeling solution with both BPV and PCA-based automated extraction flows. Support for global variation and local mismatch models for MOSFETs, BJTs, resistors, and capacitors.

RF Modeling

Dedicated RF parameter extraction packages for MOSFETs, BJTs, capacitors, diodes, inductors, and resistors. Accurate small-signal and noise parameter modeling for high-frequency circuit design.

Reliability Modeling

Extraction packages for MOS Reliability Analysis (MOSRA) and TSMC Model Interface (TMI) aging model generation, enabling predictive reliability assessment for advanced node devices.

Stress & Layout Effect Modeling

Complete flow for layout-dependent stress effect model generation and optimization. Predefined templates for STI, WPE, and other layout-dependent effects with parallel simulation support.

Macro & Subcircuit Modeling

Fastest optimization speed for macro modeling with predefined templates for high-voltage device modeling. Enables simultaneous optimization of macro variables and model parameters.

Verilog-A Model Support

Verilog-A model loading, tweaking, and custom model development with built-in compiler for user-defined compact models.

Circuit-Based Extraction

Optimize model parameters based on figure-of-merits of benchmark circuits including ring oscillator stage delay, dynamic power, and leakage power for DTCO applications.

Superior Optimization Technology

Internal optimizer supports general models, subcircuit models, Design Spec, and intermediate variables. Balances speed and accuracy with advanced algorithms for complex multi-parameter optimization.

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