Keysight.GoldenGate.RFIC.Simulation.2022

Description

Keysight.GoldenGate.RFIC.Simulation.2022 for linux

Fully Characterize Transceivers Before Tape-Out

Go beyond traditional RF simulation to design, analyze, and verify radio frequency integrated circuits (RFICs). Achieve confidence with steady-state and nonlinear solvers for design and verification. Wireless standard libraries accelerate the validation of complex RFICs.

  • accurately model components on silicon chips
  • optimize designs with sweeps and load-pull analysis
  • integrate RF designs in the Cadence Virtuoso environment
  • increase performance using Monte Carlo and yield analysis
  • simplify debugging with safe operating area warnings
  • utilize the latest foundry technology immediately

 

 

Optimize ICs from RF to mmWave

Before taping out an RFIC, verification of IC specifications via RF simulation is a must. Simulations include effects of layout parasitics, complex modulated signals, and digital control circuitry. With PathWave RFIC Design, you can simulate in both the frequency and time domain and bring your designs to and from Cadence Virtuoso.

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