Complete Transistor-Level Analysis and Debugging Environment Overview CustomExplorer™ provides a complete transistor-level analysis and debugging environment for pre-processing and post-processing SPICE and FastSPICE simulations. CustomExplorer is integrated with Synopsys’ HSPICE® and CustomSim™ to streamline the debugging and analysis process for SPICE and FastSPICE simulation and increase design productivity. The combination of CustomExplorer with CustomSim and HSPICE simulators provides design teams with a high-performance, productive simulation debug and analysis environment for complex SoC design. Download Datasheet Introduction CustomExplorer™ is a netlist-based debugging environment for SPICE and FastSPICE simulators such as HSPICE and CustomSim. CustomExplorer is also tightly integrated with Custom WaveView™, enabling waveform cross-probing. Together, these tools aid designers in rapidly performing customized advanced analyses in a highly-productive design debugging and waveform analysis environment. CustomExplorer Design Browser The CustomExplorer Design Browser allows quick access to the most complex hierarchy design data with complete design and file display. The Design Browser will import a netlist and allow traversing of the design hierarchy, display signal and element list, and tracing connections contained in the hierarchy. These views, shown in Figure 1, work in concert to provide rapid access to all of the contents of the design hierarchy. In addition to displaying the design hierarchy, the Design Browser will also display the associated file hierarchy containing the design.