Gateway supports flat or hierarchical designs of any technology. Gateway readily accepts legacy designs from other schematic editors (PSPICE, OrCAD, Composer, etc) through EDIF 200 standard. Gateway can be used by large design teams through global preferences and handles multiple designs and technologies with specific workspaces. Key Features * Powerful schematic capture and editor functionality to create and modify multi-view, multi-sheet, hierarchical IC designs * GatewayViews is licensed at no cost for only viewing and navigating schematic designs * Seamless integration with SmartSpice Circuit Simulator that creates an interactive design environment with behavioral models, cross-probing, waveform display, and analysis * Create HSPICE compatible input decks * Controls multi-user projects with shared work spaces for libraries of cells and symbols used by the design team * Transition from other schematic capture tools via EDIF 200 * Create netlists for simulation, NDL and LVS from one schematic SmartSpice delivers the highest performance and accuracy required to design complex high precision analog circuits, analog mixed-signal circuits, analyze critical nets, characterize cell libraries, etc.. SmartSpice is compatible with popular analog design flows and foundry-supplied device models. Key Features * 100% HSPICE™ and SPECTRE™ compatible for netlists, models, analysis features, and results * Provides the most accurate circuit simulation results for critical analog designs * Offers largest capacity of any true SPICE circuit simulator – up to 400 thousand active devices in 32-bit and 8 million active devices in 64-bit version * Fastest run-time of any true SPICE circuit simulator and the only SPICE supporting multiple threads for parallel operation * Multiple solvers and stepping algorithms for robust convergence * Largest collection of calibrated SPICE models for traditional technologies (Bipolar, CMOS) and emerging technologies (TFT, SOI, HBT, FRAM, etc.) * Provides open model development environment and extensive analog behavioral capability with Verilog-A * Enables SEE (Single Event Effects) reliability analysis for nanometer scale designs