Xilinx.Vivado.Design.Suite.2015.1

Description

The Industry’s First SoC-Strength Design Suite The Vivado® Design Suite delivers a SoC-strength, IP-centric and system-centric, next generation development environment that has been built from the ground up to address the productivity bottlenecks in system-level integration and implementation. The Vivado Design suite is a Generation Ahead in overall productivity, ease-of-use, and system level integration capabilities. Vivado supports the following devices families: Ultrascale, Virtex-7, Kintex-7, Artix-7, and Zynq -7000 Accelerating Implementation 4X Faster Implementation 20% Better Design Density Up to 3-Speedgrade Performance Advantage for the low-end & mid-range and 35% Power Advantage in the high-end Accelerating Integration C-based IP Generation with Vivado High Level Synthesis Model-based DSP Design Integration with System Generator for DSP Block-based IP Integration with Vivado IP Integrator Accelerating Verification Vivado Logic simulation Integrated Mixed Language Simulator Integrated & standalone Programming and Debug environments Accelerate Verification by >100X with C, C++ or SystemC with Vivado HLS What's New The Vivado Design Suite 2015.1 is available now! The latest release includes: The new Vivado Lab Edition, a no-cost, lightweight programming and debug edition of the Vivado Design Suite Interactive Clock Domain Crossing Analysis Accelerated Vivado Simulator and Third-Party Simulation Flows Xilinx SDK Advanced In-System Performance Analysis and Validation

Download

Related recommendations