Overview This course introduces concepts on full-speed hardware debugging using the Identify® toolset which provides an “embedded HDL analyzer” with debug access at the RTL level similar to an RTL simulator. Designers can take this course at their own pace and enjoy the online version of this class. Comprehensive notes complete the information displayed on each page. This course is powered by Vitalect. Objectives The course focuses on understanding concepts on instrumenting the design and using the Identify® product to successfully verify the functionality of hardware. Audience Profile Designers who wish to move away from basic logic analyzer capabilities inside an FPGA and perform real-world full-speed verification of their hardware. Prerequisites Knowledge of logic synthesis and FPGA technologies. Course Outline Identify Instrumentor IICE™ Identify Debugger Advanced Debugging