RTL (Front End) Tools Product Description Platform Express™, Mentor Graphics’ platform-based design product, enables design creation and verification by automating IP reuse. The product documents all aspects of IP using the IP-XACT™ XML databook format provided through The SPIRIT Consortium. The IP-XACT specification uses XML to create a machine-interpretable IP databook; it includes design information that software tools then use to automatically configure and integrate an IP block into a design. The power of IP-XACT is accessed through generators, which are programs that interpret the IP-XACT data to create design data. Platform Express comes with some of the most sophisticated generators available. These include mixed-language VHDL and Verilog generators that create ready-to-synthesize designs to work on a range of simulators, documentation generators, support for a wide range of Verification IP, and the ability to create software programs for processors included in the designs. Platform Express is built around standards to enable easy extensibility and customization. Platform Express is an Eclipse Plug-in with functionality that can be extended and customized for any application. Model Express is a specialist IP-XACT XML editor designed specifically to help designers document their IP easily and quickly. Using the tool and its large number of sophisticated generators, SoC designers can rapidly create and verify their system designs by automating complex, error-prone design creation, IP integration, power domain creation, software generation, verification steps, and a configurable build environment to enable easy design hand-off. Mentor and ARM are founding members of The SPIRIT Consortium, an organization created to develop an XML-based standard to automate design creation through the use of Reusable IP. The technology was invented at Mentor Graphics. Platform Express is supplied with an extensive range of example IP libraries that includes a range of ARM processors, AMBA Peripherals, generators that create HDL for many of the AMBA System buses (and many others), and support for AXI and AMBA Verification IP. It provides a new set of generators that support 0-In® Checkerware verification IP, as well as PSL and OVL assertions. The product also features direct links to the Mentor Graphics Questa™ verification environment and provides a framework for enabling other verification formats.