Introduction This Tutorial will help you to become familiar with operation Aldec Active-HDL simulator in the Lattice ispLEVER environment. No prior knowledge of HDL simulation tools is required, but elementary knowledge of VHDL and Verilog will be helpful. If you want to refresh your VHDL/Verilog, you are welcome to use our Interactive Tutorials: just go to the Help menu in Active-HDL GUI, and then select the Interactive VHDL Tutorial or Interactive Verilog Tutorial option. The same tutorial is also accessible directly from the installation CD. After reading this tutorial, you will be able to launch Active-HDL simulator from ispLEVER, compile and run and debug functional simulation and post-route timing simulations. Configuring ispLEVER to launch Aldec Active-HDL simulator 1. Double-click the ispLEVER icon on your desktop. 2. Click on the Options tab in the GUI and from the drop-down menu click Environment. 3. The Environment Options dialog should now be displayed. Select Directories tab. 4. As shown in Fig. 1, in the ‘Active-HDL:’ field, browse to the following location “C:PROGRAM FILESALDECACTIVE-HDL 7.2BIN” or the path where Active-HDL is installed on your machine. Click OK to close the Environment Options dialog window.