attice Announces ispLEVER 7.1 Service Pack 1 FPGA Design Tool Suite Tool Suite Includes New 3rd Party Synthesis and Simulator Versions, Integrated ORCAstra Utility and Concurrent LatticeMico32 Release HILLSBORO, OR – SEPTEMBER 8, 2008 – Lattice Semiconductor Corporation (NASDAQ: LSCC) today announced the immediate availability of Service Pack 1 for Version 7.1 of its ispLEVER® FPGA Design Tool Suite. The release integrates Lattice's ORCAstra configuration design utility, features Reveal™ Logic Analyzer support on the Linux Operating System, adds new versions of Synopsys' Synplify® Pro synthesis and Aldec's Active-HDL™ Lattice Edition simulator, includes support for automotive temperature grade LatticeXP2™ FPGAs and provides the latest LatticeMico32™ embedded open source microprocessor enhancements. "This ispLEVER service pack adds a wide range of new utilities and updates that are designed to increase engineers' productivity," said Tim Schnettler, director of design tools marketing at Lattice. "For example, integration of the ORCAstra configuration interface will accelerate the all important task of real hardware tuning and debug." Chris Fanning, corporate vice president, enterprise solutions, said, "ispLEVER and our open-source LatticeMico32 microprocessor have numerous improvements included in this release, and their many thousands of users will benefit from the faster, more effective design tools delivered."