Cadence ASSURA v6.15.04.12.017

Description

Cadence® Assura®v6 Physical Verification supports both interactive and batch operation modes with a single set of design rules. It uses hierarchical processing and multi-processing for fast, efficient identification and correction of design rule errors. Unique pattern-checking capabilities enable simple rule development and maintenance for hard-to-write rules. Assura Physical Verification incorporates advanced sub-65nm process parameter measurement, nanometer design rules for DFM, and process design rule checks. Assura Physical Verification reduces overall verification time because it incorporates a fast and intuitive debug capability integrated within the Virtuoso® custom design environment. It facilitates schematic-to-layout cross-probing and incorporates technologies that fix, extract, and compare errors. An interactive short locator accelerates recognition and fixing of shorts. Assura Physical Verification also offers plug-and-play integration with transistor-based Cadence QRC Extraction technology. Features/Benefits Trusted at more than 300 companies worldwide Integrates with Virtuoso AMS/custom design and simulation technologies Decreases overall DRC/LVS and rework cycle via an intuitive Virtuoso-based debug environment Integrates with the leading transistor-based parasitic extraction flow (Cadence QRC Extraction/Assura RCX transistor-based parasitic extraction)

Download-

  • Previous:Cadence SPB OrCAD 16.5.022 Hotfix
  • Next:Cadence ETS v11.11.001
  • Letters A B C D E F G H I J K L M N O P Q R S T U V W X Y Z TOP